Postdoctoral researcher at University of California, San Diego​​​​

System Energy Efficiency Lab
Department of Computer Science and Engineering
University of California, San Diego
9500 Gilman Drive, MS 0404
La Jolla, CA 92093

About
I am a postdoc in the Energy Efficiency Lab at the University of California, San Diego (UCSD). My research interests include Edge AI optimization, federated learning, and hyperdimensional computing.
I received my Ph.D. degree in Electrical Engineering from École Polytechnique Fédérale de Lausanne (EPFL) in September 2023, under the supervision of Prof. David Atienza. I studied computer engineering at Politecnico di Torino, where I received my Master of Science degree, with honors.
I practice track & field and I am also passionate about modern physics and philosophy.


B. W. Denkinger et al., "Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices," IEEE Design & Test, vol. 37, no. 2, pp. 84-92, 2020.   

M. Rios et al., "Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing," 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, pp. 1881-1886, 2021. 

F. Ponzina et al, "E2CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices," IEEE Transactions on Computers, vol. 70, no. 8, pp. 1199-1212, 2021 

F. Ponzina et al., "A Flexible In-Memory Computing Architecture for Heterogeneously Quantized CNNs," 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Tampa, FL, USA, 2021, pp. 164-169, 2021.

F. Ponzina et al., “Using Algorithmic Transformations and Sensitivity Analysis to Unleash Approximations in CNNs at the Edge,” Micromachines (Basel), 2022. 

M. Rios et al., “Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge,” Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI '22). Association for Computing Machinery, New York, NY, USA, 249–254, 2022. 

F. Ponzina et al., "An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs," 2022 IEEE International Conference on Omni-layer Intelligent Systems (COINS), Barcelona, Spain, pp. 1-6, 2022. 

F. Ponzina et al., "A Hardware/Software Co-Design Vision for Deep Learning at the Edge," IEEE Micro, vol. 42, no. 6, pp. 48-54,
Nov.-Dec. 2022.

M. Rios et al., "Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference," IEEE Transactions on Emerging Topics in Computing, 2023.

S. Zanoli et al., “An error-based approximation sensing circuit for event-triggered, low power wearable sensors,” IEEE JETCAS 2023 

F. Ponzina et al., “Overflow-free compute memories for edge ai acceleration,” ACM Transactions on Embedded Computing Systems (TECS), ACM New York, NY, USA, 2023.  (Best paper award candidate)

Google Scholar account: ‪Flavio Ponzina‬ - ‪Google Scholar‬ 

Teaching and Mentorship
As a Teaching Assistant at EPFL:
  • EE-310 - Microprogrammed Embedded Systems

As a Mentor, I had the pleasure to work with the following students:
  • Léon Delachaux (B.S. 2021 at EPFL )
  • Yuxuan Wang (M.S. 2023 at EPFL)

I BUILT MY SITE FOR FREE USING